SatCat5
cfgbus_pps.h
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1 // Copyright 2024-2025 The Aerospace Corporation.
3 // This file is a part of SatCat5, licensed under CERN-OHL-W v2 or later.
10 
11 #pragma once
12 
13 #include <satcat5/cfgbus_core.h>
14 #include <satcat5/polling.h>
15 #include <satcat5/ptp_source.h>
16 #include <satcat5/ptp_time.h>
17 
18 namespace satcat5 {
19  namespace cfg {
24  public:
25  virtual void pps_event(
26  satcat5::ptp::Time& timestamp, // PPS event timestamp.
27  satcat5::ptp::Time& delta) // Unfiltered phase correction.
28  = 0; // Child MUST override this.
29  protected:
30  ~PpsEventListener() {}
31  };
32 
41  class PpsInput : protected satcat5::poll::Timer {
42  public:
46  enum class Edge {FALLING=0, RISING=1, BOTH=2};
47 
51  explicit PpsInput(satcat5::cfg::Register reg,
52  satcat5::cfg::PpsInput::Edge mode = Edge::RISING);
53 
56  { m_callback = cb; }
57 
59  inline satcat5::ptp::Time last_pps() const { return m_pps_time; }
60 
62  inline Edge get_mode() const { return m_mode; }
63 
66  inline s64 get_offset() const { return m_offset; }
67 
71  inline void set_offset(s64 offset) { m_offset = offset; }
72 
74  void reset(Edge mode = Edge::RISING);
75 
76  protected:
77  // Internal methods.
78  bool read_pulse(); // Attempt to read one pulse
79  void timer_event() override; // Timer event handler
80 
81  // Internal state.
84  satcat5::ptp::Time m_pps_time;
85  Edge m_mode;
86  s64 m_offset;
87  s64 m_period;
88  };
89 
95  class PpsOutput : protected satcat5::poll::Timer {
96  public:
100  explicit PpsOutput(satcat5::cfg::Register reg, bool rising=true);
101 
104  inline s64 get_offset() const
105  { return m_offset; }
106 
110  void set_offset(s64 offset);
111 
113  inline bool get_polarity() const
114  { return m_rising; }
115 
117  void set_polarity(bool rising);
118 
119  protected:
120  // Internal methods.
121  void configure(); // Reload all parameters
122  void timer_event() override; // Timer event handler
123 
124  // Internal state.
126  s64 m_offset;
127  bool m_rising;
128  };
129 
132  public:
137  explicit RefOutput(
138  satcat5::cfg::Register reg_phase,
139  satcat5::cfg::Register reg_period,
140  bool rising=true);
141 
143  inline u32 get_frequency() const
144  { return m_freq_hz; }
145 
148  void set_frequency(u32 freq_hz);
149 
150  protected:
151  // Internal state.
152  satcat5::cfg::Register m_reg_period;
153  u32 m_freq_hz;
154  };
155  }
156 }
ConfigBus core definitions.
Callback interface for cfg::PpsInput events.
Definition: cfgbus_pps.h:23
Driver for the PPS input block (ptp_pps_in.vhd).
Definition: cfgbus_pps.h:41
PpsInput(satcat5::cfg::Register reg, satcat5::cfg::PpsInput::Edge mode=Edge::RISING)
Link this driver to the hardware control register.
Definition: cfgbus_pps.cc:14
void set_offset(s64 offset)
Set phase offset for calculating clock discipline.
Definition: cfgbus_pps.h:71
Edge get_mode() const
Get the current edge-detection mode.
Definition: cfgbus_pps.h:62
s64 get_offset() const
Get the current phase offset setting.
Definition: cfgbus_pps.h:66
Edge
Detect rising edges, falling edges, or both.
Definition: cfgbus_pps.h:46
void reset(Edge mode=Edge::RISING)
Clear FIFO and set the active edge (rising or falling).
Definition: cfgbus_pps.cc:26
void set_callback(satcat5::cfg::PpsEventListener *cb)
Set recipient for phase-offset information.
Definition: cfgbus_pps.h:55
void timer_event() override
Child class MUST override this method.
Definition: cfgbus_pps.cc:86
satcat5::ptp::Time last_pps() const
Return the time of the last observed PPS event.
Definition: cfgbus_pps.h:59
Driver for the PPS output block (ptp_pps_out.vhd).
Definition: cfgbus_pps.h:95
s64 get_offset() const
Query the phase-offset for this output.
Definition: cfgbus_pps.h:104
void set_polarity(bool rising)
Set the rising- or falling-edge polarity of this output.
Definition: cfgbus_pps.cc:108
PpsOutput(satcat5::cfg::Register reg, bool rising=true)
Link this driver to the hardware control register.
Definition: cfgbus_pps.cc:91
void set_offset(s64 offset)
Adjust the phase-offset for this output.
Definition: cfgbus_pps.cc:103
bool get_polarity() const
Query the polarity of this output.
Definition: cfgbus_pps.h:113
void timer_event() override
Child class MUST override this method.
Definition: cfgbus_pps.cc:99
Variant of PpsOutput with frequency-control enabled.
Definition: cfgbus_pps.h:131
u32 get_frequency() const
Query the frequency for this output.
Definition: cfgbus_pps.h:143
RefOutput(satcat5::cfg::Register reg_phase, satcat5::cfg::Register reg_period, bool rising=true)
Link this driver to the hardware control register.
Definition: cfgbus_pps.cc:133
void set_frequency(u32 freq_hz)
Adjust the frequency for this output.
Definition: cfgbus_pps.cc:141
Pointer-like wrapper for one or more ConfigBus registers.
Definition: cfgbus_core.h:76
Timer objects are polled after a fixed delay or at a regular interval.
Definition: polling.h:213
High-precision timestamp for use with PTP / IEEE1588.
Definition: ptp_time.h:41
Core event-processing loop for SatCat5 software.
Define the API for generating ptp::Measurement events.
High-precision "Time" object for use with PTP / IEEE1588.