Detailed Description

Driver for the PPS input block (ptp_pps_in.vhd).

The VHDL input block accepts an incoming PPS signal and a PTP time reference, timestamps each PPS rising or falling edge, and writes those timestamps to a FIFO. This software driver configures that block and polls the FIFO, reading the stored hardware timestamps. The result can be fed to a ptp::TrackingController for closed-loop discipline of the original PTP time reference.

See also: satcat5::ptp::PpsOutput

Definition at line 41 of file cfgbus_pps.h.

#include <cfgbus_pps.h>

Inheritance diagram for satcat5::cfg::PpsInput:

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Collaboration diagram for satcat5::cfg::PpsInput:

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Public Types
enum class	Edge { FALLING =0 , RISING =1 , BOTH =2 }
	Detect rising edges, falling edges, or both. More...

Public Member Functions
	PpsInput (satcat5::cfg::Register reg, satcat5::cfg::PpsInput::Edge mode=Edge::RISING)
	Link this driver to the hardware control register. More...

void	set_callback (satcat5::cfg::PpsEventListener *cb)
	Set recipient for phase-offset information.

satcat5::ptp::Time	last_pps () const
	Return the time of the last observed PPS event.

Edge	get_mode () const
	Get the current edge-detection mode.

s64	get_offset () const
	Get the current phase offset setting. More...

void	set_offset (s64 offset)
	Set phase offset for calculating clock discipline. More...

void	reset (Edge mode=Edge::RISING)
	Clear FIFO and set the active edge (rising or falling).

Protected Member Functions
bool	read_pulse ()

void	timer_event () override
	Child class MUST override this method.

void	timer_once (unsigned msec)
	Configure a one-time notification after X milliseconds.

void	timer_every (unsigned msec)
	Configure a repeating notification every X milliseconds.

void	timer_stop ()
	Stop all future notifications.

unsigned	timer_interval () const
	Accessor for recurring timer interval, if one is set.

unsigned	timer_remaining () const
	Accessor for time to next event, if one is set.

Static Protected Member Functions
static unsigned	count_timer ()
	Count all objects of this type, including idle timers.

Protected Attributes
satcat5::cfg::Register	m_reg

satcat5::cfg::PpsEventListener *	m_callback

satcat5::ptp::Time	m_pps_time

Edge	m_mode

s64	m_offset

s64	m_period

Private Member Functions
void	query (unsigned elapsed_msec)

Private Attributes
satcat5::poll::Timer *	m_next

unsigned	m_trem

unsigned	m_tnext

Member Enumeration Documentation

◆ Edge

enum satcat5::cfg::PpsInput::Edge

strong

Detect rising edges, falling edges, or both.

In RISING or FALLING mode, the maximum supported offset is +/- 500 msec. In BOTH mode, the maximum is +/- 250 msec.

Definition at line 46 of file cfgbus_pps.h.

Constructor & Destructor Documentation

◆ PpsInput()

PpsInput::PpsInput	(	satcat5::cfg::Register	reg,
		satcat5::cfg::PpsInput::Edge	mode = `Edge::RISING`
	)

explicit

Link this driver to the hardware control register.

Parameters

reg	Sets ConfigBus control register.
mode	Sets the default input polarity.

Definition at line 14 of file cfgbus_pps.cc.

Member Function Documentation

◆ get_offset()

s64 satcat5::cfg::PpsInput::get_offset ( ) const

inline

Get the current phase offset setting.

Returns: Offset in subnanoseconds,

See also: set_offset.

Definition at line 66 of file cfgbus_pps.h.

◆ set_offset()

void satcat5::cfg::PpsInput::set_offset ( s64 offset )

inline

Set phase offset for calculating clock discipline.

Units are subnanoseconds,

See also: satcat5::ptp::Time. Positive values indicate the PPS input lags the GPS epoch.

Definition at line 71 of file cfgbus_pps.h.

The documentation for this class was generated from the following files:

Detailed Description

Public Types

Public Member Functions

Protected Member Functions

Static Protected Member Functions

Protected Attributes

Private Member Functions