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SatCat5
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Simulated bank of ConfigBus registers.
This class wraps an array of CfgRegister objects, representing a ConfigBus "device-address" spanning up to 1024 registers. It provides accessors for configuring individual registers, or for configuring all registers at once.
Definition at line 94 of file sim_cfgbus.h.
#include <sim_cfgbus.h>
Public Member Functions | |
| satcat5::cfg::IoStatus | read (unsigned regaddr, u32 &val) override |
| Basic single-register read operation. | |
| satcat5::cfg::IoStatus | write (unsigned regaddr, u32 wrval) override |
| Basic single-register write operation. | |
| satcat5::test::CfgRegister & | operator[] (unsigned idx) |
| Accessor for each simulated register. | |
| void | irq_poll () |
| Make the "irq_poll" method accessible. | |
| virtual satcat5::cfg::IoStatus | read_array (unsigned regaddr, unsigned count, u32 *result) |
| Bulk-read with auto-increment (regaddr, regaddr+1, ...) Bulk read/write operations are more efficient when controlling ConfigBus peripherals over a network interface. | |
| virtual satcat5::cfg::IoStatus | read_repeat (unsigned regaddr, unsigned count, u32 *result) |
| Bulk-read the same register N times. | |
| virtual satcat5::cfg::IoStatus | write_array (unsigned regaddr, unsigned count, const u32 *data) |
| Bulk-write with auto-increment (regaddr, regaddr+1, ...) | |
| virtual satcat5::cfg::IoStatus | write_repeat (unsigned regaddr, unsigned count, const u32 *data) |
| Bulk-write the same register N times. | |
| unsigned | get_regaddr (unsigned dev, unsigned reg) const |
| Convert device + register to combined address. | |
| void | register_irq (satcat5::cfg::Interrupt *obj) |
| Add an interrupt handler. More... | |
| void | unregister_irq (satcat5::cfg::Interrupt *obj) |
| Remove an interrupt handler. | |
| unsigned | count_irq () const |
| Count attached interrupt handlers. | |
| satcat5::cfg::Register | get_register (unsigned dev, unsigned reg=0) |
| Create register-map object for the given device address. More... | |
| void | read_default_none () |
| Set read mode for all contained registers. More... | |
| void | read_default_echo () |
| Set read mode for all contained registers. More... | |
| void | read_default (u32 val) |
| Set read mode for all contained registers. More... | |
Protected Attributes | |
| satcat5::test::CfgRegister | reg [satcat5::cfg::REGS_PER_DEVICE] |
| volatile u32 * | m_base_ptr |
| satcat5::util::List< satcat5::cfg::Interrupt > | m_irq_list |
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inherited |
Create register-map object for the given device address.
(Or for a specific register, if the register address is specified.)
Definition at line 101 of file cfgbus_core.cc.
| void CfgDevice::read_default | ( | u32 | val | ) |
Set read mode for all contained registers.
Definition at line 108 of file sim_cfgbus.cc.
| void CfgDevice::read_default_echo | ( | ) |
Set read mode for all contained registers.
Definition at line 103 of file sim_cfgbus.cc.
| void CfgDevice::read_default_none | ( | ) |
Set read mode for all contained registers.
Definition at line 98 of file sim_cfgbus.cc.
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inherited |
Add an interrupt handler.
Each ConfigBus interface has a single interrupt signal, which is the logical OR of interrupts from all attached peripherals. When any peripheral raises its interrupt signal, call irq_poll().
Definition at line 80 of file cfgbus_core.cc.