SatCat5
cfgbus_i2c.h
1 // Copyright 2021-2025 The Aerospace Corporation.
3 // This file is a part of SatCat5, licensed under CERN-OHL-W v2 or later.
5 // Interace driver for "cfgbus_i2c_controller".
6 
7 #pragma once
8 
9 #include <satcat5/cfg_i2c.h>
10 #include <satcat5/cfgbus_multiserial.h>
11 
12 // Default sizes for the I2C working buffers
13 // For reference: 256 bytes = 5.7 msec buffer @ 400 kbaud
14 #ifndef SATCAT5_I2C_TXBUFF
15 #define SATCAT5_I2C_TXBUFF 256 // Up to N bytes of queued commands
16 #endif
17 
18 #ifndef SATCAT5_I2C_RXBUFF
19 #define SATCAT5_I2C_RXBUFF 64 // Up to N bytes of queued replies
20 #endif
21 
22 #ifndef SATCAT5_I2C_MAXCMD
23 #define SATCAT5_I2C_MAXCMD 16 // Each queue up to N transactions
24 #endif
25 
26 namespace satcat5 {
27  namespace cfg {
33  class I2c
36  {
37  public:
39  I2c(satcat5::cfg::ConfigBus* cfg, unsigned devaddr);
40 
42  void configure(
43  unsigned refclk_hz, // ConfigBus reference clock
44  unsigned baud_hz, // Desired I2C baud rate
45  bool clock_stretch = true); // Allow clock-stretching?
46 
48  bool busy() override;
49 
52  bool read(const satcat5::util::I2cAddr& devaddr,
53  u8 regbytes, u32 regaddr, u8 nread,
54  satcat5::cfg::I2cEventListener* callback = 0) override;
55 
58  bool write(const satcat5::util::I2cAddr& devaddr,
59  u8 regbytes, u32 regaddr, u8 nwrite, const u8* data,
60  satcat5::cfg::I2cEventListener* callback = 0) override;
61 
62  protected:
63  // Shared logic for for read() and write() methods.
64  bool enqueue_cmd(
65  const satcat5::util::I2cAddr& devaddr,
66  u8 regbytes, u32 regaddr,
67  u8 nwrite, const u8* data, u8 nread,
68  satcat5::cfg::I2cEventListener* callback = 0);
69 
70  // Event handlers.
71  void read_done(unsigned idx);
72 
73  // Metadata for queued commands.
74  satcat5::cfg::I2cEventListener* m_callback[SATCAT5_I2C_MAXCMD];
75  u16 m_devaddr[SATCAT5_I2C_MAXCMD];
76  u32 m_regaddr[SATCAT5_I2C_MAXCMD];
77 
78  // Working buffer for transmit and receive data.
79  u8 m_txbuff[SATCAT5_I2C_TXBUFF];
80  u8 m_rxbuff[SATCAT5_I2C_RXBUFF];
81  };
82  }
83 }
Generic ConfigBus API.
Definition: cfgbus_core.h:124
Callback interface for cfg::I2cGeneric events.
Definition: cfg_i2c.h:78
Polymorphic API for a generic I2C interface.
Definition: cfg_i2c.h:95
Interace driver for "cfgbus_i2c_controller".
Definition: cfgbus_i2c.h:36
bool busy() override
Is the I2C controller currently busy?
Definition: cfgbus_i2c.cc:48
void read_done(unsigned idx)
Callback when each transaction is finished.
Definition: cfgbus_i2c.cc:146
I2c(satcat5::cfg::ConfigBus *cfg, unsigned devaddr)
Constructor links to specified ConfigBus address.
Definition: cfgbus_i2c.cc:27
bool read(const satcat5::util::I2cAddr &devaddr, u8 regbytes, u32 regaddr, u8 nread, satcat5::cfg::I2cEventListener *callback=0) override
Add a read operation to the queue.
Definition: cfgbus_i2c.cc:53
bool write(const satcat5::util::I2cAddr &devaddr, u8 regbytes, u32 regaddr, u8 nwrite, const u8 *data, satcat5::cfg::I2cEventListener *callback=0) override
Add a write operation to the queue.
Definition: cfgbus_i2c.cc:66
void configure(unsigned refclk_hz, unsigned baud_hz, bool clock_stretch=true)
Configure the I2C controller.
Definition: cfgbus_i2c.cc:35
Partial driver for the multipurpose serial peripheral.
Conversion function for I2C device addresses.
Definition: cfg_i2c.h:30