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SatCat5
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Device driver for the NXP SC18IS602B I2C-to-SPI bridge.
The SC18IS602B is an SPI master that is controlled through an I2C bus, allowing indirect control of downstream SPI peripherals. This driver concerts each SPI transaction into a series of I2C commands.
Note: One SPI transaction at a time; no queueing is provided.
Reference: https://www.nxp.com/docs/en/data-sheet/SC18IS602B.pdf
Definition at line 23 of file i2c_sc18s602.h.
#include <i2c_sc18s602.h>
Public Member Functions | |
| Sc18is602 (satcat5::cfg::I2cGeneric *i2c, const satcat5::util::I2cAddr &devaddr) | |
| Constructor links to specified control register. | |
| bool | configure (unsigned spi_mode) |
| Configure the SPI mode (0/1/2/3 sets CPOL, CPHA) | |
| bool | busy () override |
| Is the SPI controller currently busy? | |
| bool | exchange (u8 devidx, const u8 *wrdata, u8 rwbytes, satcat5::cfg::SpiEventListener *callback=0) override |
| Queue a read-and-write SPI bus transaction. More... | |
| bool | query (u8 devidx, const u8 *wrdata, u8 wrbytes, u8 rdbytes, satcat5::cfg::SpiEventListener *callback=0) override |
| Queue a write-then-read SPI bus transaction. More... | |
Protected Member Functions | |
| void | i2c_done (bool noack, const satcat5::util::I2cAddr &devaddr, u32 regaddr, unsigned nread, const u8 *rdata) override |
| bool | execute (u8 devidx, const u8 *wrdata, u8 rwbytes, u8 skip) |
Protected Attributes | |
| satcat5::cfg::I2cGeneric *const | m_parent |
| const satcat5::util::I2cAddr | m_devaddr |
| satcat5::cfg::SpiEventListener * | m_callback |
| u8 | m_busy |
| u8 | m_skip |
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overridevirtual |
Queue a read-and-write SPI bus transaction.
Write N bytes and concurrently read N bytes.
Implements satcat5::cfg::SpiGeneric.
Definition at line 53 of file i2c_sc18s602.cc.
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overridevirtual |
Queue a write-then-read SPI bus transaction.
Write N bytes and then read M bytes.
Implements satcat5::cfg::SpiGeneric.
Definition at line 70 of file i2c_sc18s602.cc.