hal_ublaze/interrupts.h

// Copyright 2021-2025 The Aerospace Corporation.
// This file is a part of SatCat5, licensed under CERN-OHL-W v2 or later.
// Xilinx Microblaze implementation of the "InterruptController" class
 
#pragma once
 
#include <satcat5/interrupts.h>
#include <xparameters.h>
 
// Check if BSP will include the XIntc driver before proceeding.
#if XPAR_XINTC_NUM_INSTANCES > 0
 
#include <xintc.h>
 
namespace satcat5 {
    namespace irq {
        class ControllerMicroblaze : public satcat5::irq::Controller {
        public:
            explicit ControllerMicroblaze(XIntc* xintc);
 
            void irq_start(
                u16 dev_id,                             // Xilinx device-ID
                satcat5::util::TimeRef* timer = 0,      // Diagnostic timer
                u32 opts = XIN_SVC_ALL_ISRS_OPTION);    // Xilinx option flags
 
        protected:
            // Hardware-abstraction overrides.
            void irq_pause() override;
            void irq_resume() override;
            void irq_register(satcat5::irq::Handler* obj) override;
            void irq_unregister(satcat5::irq::Handler* obj) override;
            void irq_acknowledge(satcat5::irq::Handler* obj) override;
 
        private:
            XIntc* const m_xintc;
        };
    }
}
 
#endif  // XPAR_XINTC_NUM_INSTANCES > 0